Zhichen Zeng

zhichen.JPG

409, Paul Allen Center

185 E Stevens Way NE, Seattle, WA

Hello, this is Zhichen (郅琛) :smile:

I am a first-year PhD student in Computer Engineering at the University of Washington, advised by Prof. Ang Li and working closely with Prof. Baris Kasikci. Before joining UW, I graduated from the University of Science and Technology of China (USTC) majoring in Physics & Computer Science, I had an happy time at USTC and was honored to receive the Guo Moruo Scholarship—the highest honor for USTC undergrads.

I had a rewarding and enjoyable research internship at Microsoft Research Asia, I worked with Dr. Shijie Cao and Dr. Ting Cao on developing efficient systems and algorithms for large language models with long contexts. Another memorable internship was at Cornell, where I worked with Prof. Zhiru Zhang on domain-specific compilers for accelerator design.

Feel free to reach out if you’d like to connect—I’m always open to new collaborations and conversations!

news

Nov 03, 2024 Our Tensor Processing Engines paper has been accepted to HPCA’25 :blush:
Sep 05, 2024 Thrilled to share that I’ve completed my six-month intern at MSRA with an amazing team and honored with the Stars of Tomorrow award! :tada: :tada:
Aug 01, 2024 Our EN-Tensorcore paper has been accepted to ICCD’24 :blush:
Apr 20, 2024 Awarded the 43rd Guo Moruo Scholarship (highest honor of USTC undergrads) :tada: :tada:
Apr 15, 2024 I’m starting my PhD at ECE@UW this Fall 2024. See you in Seattle :grin:

selected publications

  1. Under Review
    SeerAttention: Learning Intrinsic Sparse Attention in Your LLMs
    Yizhao Gao* , Zhichen Zeng*, Dayou Du , Shijie Cao , and 4 more authors
    arXiv, 2024
  2. PLDI
    Allo: A Programming Model for Composable Accelerator Design
    Hongzheng Chen* , Niansong Zhang* , Shaojie Xiang , Zhichen Zeng, and 2 more authors
    ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), 2024
  3. HPCA
    Exploring the Performance Improvement of Tensor Processing Engines through Transformation in the Bit-weight Dimension of MACs
    Qizhe Wu , Huawen Liang , Yuchen Gui , Zhichen Zeng, and 6 more authors
    the International Symposium on High-Performance Computer Architecture (HPCA), 2025
  4. ICCD
    EN-T: Optimizing Tensor Computing Engines Performance via Encoder-Based Methodology
    Qizhe Wu , Yuchen Gui , Zhichen Zeng, Xiaotian Wang , and 2 more authors
    IEEE 42nd International Conference on Computer Design (ICCD), 2024
  5. Under Review
    LUT Tensor Core: Lookup Table Enables Efficient Low-Bit LLM Inference Acceleration
    Zhiwen Mo , Lei Wang , Jianyu Wei , Zhichen Zeng, and 7 more authors
    arXiv, 2024